From 8f0c3e00e34a78796641ae8a8841133bc131e39f Mon Sep 17 00:00:00 2001
From: alpine9000 <alex.g.brown@gmail.com>
Date: Fri, 11 Mar 2016 19:53:18 +1100
Subject: [PATCH] Update README.md

---
 014.lace_mode/README.md | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/014.lace_mode/README.md b/014.lace_mode/README.md
index db1e1ac..1574776 100644
--- a/014.lace_mode/README.md
+++ b/014.lace_mode/README.md
@@ -26,17 +26,17 @@ Then, during the vertical blank, depending on the LOF bit in the VPOSR register,
 
 ```
  .mainLoop:
-	bsr	waitVerticalBlank
-	btst.w	#VPOSRLOFBIT,VPOSR(a6)
-	beq.s	.lof
-	lea	copper(pc),a0
-	move.l	a0,COP1LC(a6)
-	bra	.done
+	bsr     waitVerticalBlank
+	btst.w  #VPOSRLOFBIT,VPOSR(a6)
+	beq.s   .lof
+	lea     copper(pc),a0
+	move.l  a0,COP1LC(a6)
+	bra     .done
  .lof:
-	lea	copperLOF(pc),a0
-	move.l	a0,COP1LC(a6)
+	lea     copperLOF(pc),a0
+	move.l  a0,COP1LC(a6)
  .done
-	bra	.mainLoop
+	bra     .mainLoop
 ```
 
 This example allows your to enable/disable INTERLACE mode in the [Makefile](Makefile):