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Update README.md
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@@ -26,17 +26,17 @@ Then, during the vertical blank, depending on the LOF bit in the VPOSR register,
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```
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.mainLoop:
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bsr waitVerticalBlank
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btst.w #VPOSRLOFBIT,VPOSR(a6)
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beq.s .lof
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lea copper(pc),a0
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move.l a0,COP1LC(a6)
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bra .done
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bsr waitVerticalBlank
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btst.w #VPOSRLOFBIT,VPOSR(a6)
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beq.s .lof
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lea copper(pc),a0
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move.l a0,COP1LC(a6)
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bra .done
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.lof:
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lea copperLOF(pc),a0
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move.l a0,COP1LC(a6)
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lea copperLOF(pc),a0
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move.l a0,COP1LC(a6)
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.done
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bra .mainLoop
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bra .mainLoop
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```
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This example allows your to enable/disable INTERLACE mode in the [Makefile](Makefile):
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